HD6473837H Datasheet, PDF (69/562 Pages) Renesas Technology Corp – Hardware Manual

2.8.2 LCD RAM Address Relocation
After a reset, the LCD RAM area is located at addresses H'F740 to H'F77F. However, this area
can be relocated by setting the LCD RAM relocation register (RLCTR) bits. The LCD RAM
relocation register is explained below.
LCD RAM relocation register (RLCTR: H'FFCF)
Bit
7
6
5
4
3
2
1
0
—
—
—
—
—
— RLCT1 RLCT0
Initial value
1
1
1
1
1
1
0
0
Read/Write
—
—
—
—
—
—
R/W
R/W
RLCTR is an 8-bit read/write register that selects the LCD RAM address space. Upon reset,
RLCTR is initialized to H'00.
Bits 7 to 2: Reserved Bits
Bits 7 to 2 are reserved; they are always read as 1, and cannot be modified.
Bits 1 and 0: LCD RAM relocation select (RLCT1, RLCT0)
Bits 1 and 0 select the LCD RAM address space.
Bit 1: RLCT1
Bit 0: RLCT0
Description
0
0
H'F740 toH'F77F
(initial value)
1
H'F940 to H'F97F*²
1
0
H'FB40 to H'FB7F*²
1
H'FD40 to H'FD7F*^{1, 2}
Notes: 1. In devices with 1,024-byte RAM, if RLCT1 to 0 are set to 11, on-chip RAM addresses
H'FB80 to H'FD7F become inaccessible.
2. In devices with 2,048-byte RAM, if RLCT1 to 0 are set to any value except 00, these on-
chip RAM addresses become inaccessible.
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