HD6473837H Datasheet, PDF (290/562 Pages) Renesas Technology Corp – Hardware Manual

Figure 10.11 shows a typical flow chart for SCI3 initialization.
Start
Clear TE and RE to 0 in SCR3
1
Set bits CKE1 and CKE0
2 Select communication format in SMR
3
Set BRR value
Wait
Has a 1-bit
No
interval elapsed?
Yes
Set bits RIE, TIE, TEIE, and MPIE
4
in SCR3, and set TE or RE to 1
End
1. Select the clock in serial control register 3
(SCR3). Other bits must be cleared to 0.
If clock output is selected in asynchronous
mode, a clock signal will be output as soon
as CKE1 and CKE2 have been set.
During reception in synchronous mode, if
clock output is selected by bits CKE1 and
CKE0, a clock signal will be output as soon
as RE is set to 1.
2.
Set the transmit/receive format in the serial
mode register (SMR).
3.
Set the bit rate register (BRR) to the value
giving the desired bit rate.
This step is not required when an external
clock source is used.
4.
Wait for at least a 1-bit interval, then set
bits RIE, TIE, TEIE, and MPIE, and set bit
TE or RE in SCR3 to 1. Setting TE or RE
enables SCI3 to use the TXD or RXD pin.
The initial states in asynchronous mode
are the mark transmit state and the idle
receive state (waiting for a start bit).
Figure 10.11 Typical Flow Chart when SCI3 Is Initialized
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