HD6473837H Datasheet, PDF (334/562 Pages) Renesas Technology Corp – Hardware Manual

Bit 6—Power Switch (PSW): Bit 6 switches the resistive voltage divider provided to power the
LCD driver on/off. In low-power modes when the LCD display is not used, or when an external
power supply is used for the LCD, the resistive voltage divider can be switched off. When bit
ACT = 0, or in standby mode, the resistive voltage divider is in the off state regardless of the bit 6
setting.
Bit 6: PSW
0
1
Description
LCD power supply resistive voltage divider off
LCD power supply resistive voltage divider on
(initial value)
Bit 5:—Display Active (ACT): Bit 5 selects whether the LCD controller/driver is used or not.
When this bit is cleared to 0, the LCD controller/driver module halts operation, and the resistive
voltage divider provided for the LCD driver power supply goes to the off state regardless of the
PSW setting. However, register contents are retained.
Bit 5: ACT
0
1
Description
LCD controller/driver operation stopped
LCD controller/driver operational
(initial value)
Bit 4—Display Data Control (DISP): Bit 4 selects whether the LCD RAM contents are
displayed or blank data is displayed regardless of the LCD RAM contents. This bit is valid also
when the HD66100 is used for external segment expansion.
Bit 4: DISP
0
1
Description
Blank data displayed
LCD RAM data displayed
(initial value)
Bits 3 to 0—Frame Frequency Select 3 to 0 (CKS3 to CKS0): Bits 3 to 0 select the clock used
by the LCD controller/driver, and the frame frequency. In subactive, watch, and subsleep modes
the system clock (φ) is stopped, so there will be no display in these modes if φ/2 to φ/256 is chosen
as the clock source. For display in these modes, clock φ_W/2 or φ_W/4 must be selected.
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