PXB4340E Datasheet, PDF (74/185 Pages) Infineon Technologies AG – ICs for Communications

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Read/write Address B0_H
Value after reset 0000_H

DWDRL(15:8)

DWDRL(7:0)
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DWDRL(15:0)
DMA Write Register(15:0), specifies the lower 16-bit of the Dword to be
written into the external connection RAM via DMA. The bit positions to
be overwritten in the connection RAM Dword are specified with the
associated mask register DMRL, the Dword of the RAM entry is
selected by DCONF.INDEX.
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Read/write Address B1_H
Value after reset 0000_H


SP
DWDRH(14:8)


DWDRH(7:0)
SP
DWDRH(14:0)
Select Parity: if SP=0 the correct parity is generated when the dword is
transferred to the external RAM; if SP=1 a false parity bit is generated.
DMA Write Register(31:16), specifies the upper 16-bit of the Dword to
be written into the external connection RAM via DMA. The bit positions
to be overwritten in the connection RAM Dword are specified with the
associated mask register DMRL, the Dword of the RAM entry is
selected by DCONF.INDEX.
Data Sheet
3-74
04.2000