PXB4340E Datasheet, PDF (101/185 Pages) Infineon Technologies AG – ICs for Communications

Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
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CARIEN
0
F5 AIS Cell insertion disabled.
1
F5 AIS Cell insertion enabled.
Independent on the reason for cell generation (forced
insertion by ARINS, physical error by µP register
PHYERR, detected LOC or AIS state) AIS/RDI cell
generation is always controlled by this flag. Used e.g. to
suppress RDI at endpoints of multicast connections.
CLOCFAI
F5 LOC failure state indication. Initialize to 0 at connection setup. Do
not change by µP in normal operation.
CLOCDEF
F5 LOC defect state indication. Initialize to 0 at connection setup. Do
not change by µP in normal operation.
CRDIFAI
F5 RDI failure state indication. Initialize to 0 at connection setup. Do not
change by µP in normal operation.
CRDIDEF
F5 RDI defect state indication. Initialize to 0 at connection setup. Do not
change by µP in normal operation.
CAISFAI
F5 AIS failure state indication. Initialize to 0 at connection setup. Do not
change by µP in normal operation.
CAISDEF
F5 AIS defect state indication. Initialize to 0 at connection setup. Do not
change by µP in normal operation.
Data Sheet
3-101
04.2000