PXB4340E Datasheet, PDF (49/185 Pages) Infineon Technologies AG – ICs for Communications

3;%  (
)XQFWLRQDO 'HVFULSWLRQ
For the DMA data transfers a 32 word FIFO is provided on-chip for DMA read (figure 31). It is
emptied by the microprocessor via consecutive reads of the DMA register. The DMA request pin
of the PXB 4340 AOP is asserted when the FIFO is occupied and deasserted when it is empty.
The DMA transfer itself must be executed by an external DMA controller.
external
AOP RAM up or down
entry k
cell access
AOP
SCAN / OAM
DMA-Option
µP access
transfer registers
32 x 16 bit words FIFO
DMAR register
µP - i/f
)LJXUH  6FDQ 0HFKDQLVP ZLWK 2$0 DQGRU '0$ )XQFWLRQ
 5HFHLYH DQG 7UDQVPLW %XIIHU
The PXB 4340 AOP provides a 12-cell receive buffer and a 1-cell transmit buffer. They are used
for insertion and extraction of LB cells, activation and deactivation cells and special cells defined
with the cell filters (see VHFWLRQ ).
The buffers are realized differently. The transmit buffer consists of 27 words, directly
addressable by the microprocessor for read and write. When the cell is assembled it can be
inserted by setting a command bit. The command bit is reset after complete insertion of the cell
into the data stream. The insertion direction, up- or downstream can be selected and also if the
CRC-10 should be computed automatically by the chip or not.
The receive buffer is realized as FIFO with word-wise access via a single register. A cell is read
with 27 consecutive read accesses to this register. Reception of a cell is signalled to the
microprocessor via an interrupt bit. The interrupt bit is reset by the chip automatically after the
last read access if no more cell is in the buffer. The receive buffer collects cells from up- and
downstream direction, they are distinguished with a bit in the UDF2 octet. Cell format for both
receive and transmit buffer is the 16-bit UTOPIA format as described in VHFWLRQ .
Data Sheet
2-49
04.2000