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PXB4340E Datasheet, PDF (31/185 Pages) Infineon Technologies AG – ICs for Communications
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The actual F5-AIS/RDI state is indicated by bits 14..19 in Dword2 of the downstream external
Ram entry (VHFWLRQ  page 114) and the upstream external RAM entry (VHFWLRQ 
page 102). For the actual F4-AIS/RDI state information use bits 22..27 in Dword4 of the
downstream external RAM entry (VHFWLRQ  page 116) and the upstream external RAM
entry (VHFWLRQ  page 105). The µP is informed by the interrupts DCSTTR for downstream
F5, UCSTTR for upstream F5, DPSTTR for downstream F4 and UPSTTR for upstream F4 state
transitions (VHFWLRQ  page 83).
Both forward and backward cell insertions are initiated by the SCAN mechanism
(see VHFWLRQ ). All delay times given are default values, recommended by []. The
PXB 4340 AOP allows to program these values in multiples of the 0.5 second SCAN period
given by the microprocessor. Therefore consider the register description of SCCONF1 (see
VHFWLRQ  page 79).
The 0.5 second SCAN period determines the insertion delay for OAM cells. If the SCAN
mechanism has passed a connection entry just before an AIS condition became true the
maximum waiting time for the next SCAN access is about 0.5 second.
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The mechanism to detect failures like misrouting is the Continuity Check (CC). Its idea is to insert
dummy cells in a connection if it is inactive, i.e. if the user is not sending data cells. The dummy
cells are called CC OAM cells and are inserted at the originating end/segment point of a
connection after a one second absence of user cells. The repetition interval is also one second.
At the connection/segment endpoint the CC cells are discarded. If no user or OAM cells are
received within 3.5 seconds the Loss of Continuity (LOC) defect state is declared. Like AIS state
LOC causes the automatic insertion of VP-AIS or VC-AIS cells for the affected connections. If
LOC is detected at a terminating endpoint RDI cells are generated in backward direction.
)LJXUH  shows an example for the operation of CC: two VCCs entering a switch at ports a and
b should both be forwarded to port c. Due to misrouting within the switching fabric the cells of
VCC b are forwarded to an unconnected switch output, where they are lost without being
notified. The CC detection function at port c, however, detects the absence of user cells after the
3.5 seconds time-out and inserts VC-AIS cells for connection b.
The time values given are values recommended in [6]. The PXB 4340 AOP allows to progam
them in a wide range.
The PXB 4340 AOP supports the CC function for all 16384 connections in both up- and
downstream direction. Setting one bit in the respective connection RAM is sufficient to activate
the origination or the termination of a CC flow. This is bit 11 in Dword1 (up-/downstream) for
originating F5 segment CC, bit 10 in Dword1 (up-/downstream) for originating F5 end-to-end CC
and bit 11 in Dword4 (up-/downstream) for originating F4 segment CC (see VHFWLRQ  page
98). All other actions are automatic:
At the CC origination point (see ILJXUH and ILJXUH  ):
• continuous supervision of user cell stream (see ILJXUH , marker €)
• periodic insertion of CC cells in one second intervals after one second (standard) time-out
(see ILJXUH , marker €)
Data Sheet
2-31
04.2000