PXB4340E Datasheet, PDF (64/185 Pages) Infineon Technologies AG – ICs for Communications

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Read/write Address 60_H..67_H
Value after reset 0000_H
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60 LSIDR0
Port ID byte #15
Port ID byte #14
61 LSIDR1
Port ID byte #13
Port ID byte #12
62 LSIDR2
Port ID byte #11
Port ID byte #10
63 LSIDR3
Port ID byte #9
Port ID byte #8
64 LSIDR4
Port ID byte #7
Port ID byte #6
65 LSIDR5
Port ID byte #5
Port ID byte #4
66 LSIDR6
Port ID byte #3
Port ID byte #2
67 LSIDR7
Port ID byte #1
Port ID byte #0
The 16-octet Port ID defines a unique identifier for the switch port. It is used for intra-domain LB
cells. Depending on layer point configuration and settings the Port ID is compared with Location
or Source ID of the LB cell.
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Read/write Address 68_H..69_H
Value after reset 0000_H
Both CTR0 and CTR1 have the same mapping:

Unused

OAMTYP(3:0)

ACTION(1:0)

FUNCTYP(3:0)
Using these registers two OAM cell types can be defined. OAM cells in the cell stream which
match a programmed pattern are treated according to the four options defined in the
corresponding ACTION(1:0) bits. The action is executed for all matching cells in up- and
downstream direction. This function is provided to support new or proprietary OAM cell types.
These could be dropped to the microprocessor and handled by SW.
Recognized as OAM cells are: all cells with either PTI=100 or 101 or VCI=3 or 4 and which have
the correct CRC-10. OAM cells with incorrect CRC-10 are discarded anyway with notification in
interrupt status register ISR0 and additionally an indication in the external connection RAM entry
for the respective connection (LCI).
Data Sheet
3-64
04.2000