PXB4340E Datasheet, PDF (136/185 Pages) Infineon Technologies AG – ICs for Communications

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Receive and transmit side of ATM and PHY side UTOPIA interface operate each from one clock
which may be completely independent from the main chip clock SYSCLK. The UTOPIA clock
frequency must be less than or equal to the main chip clock SYSCLK.
The UTOPIA interface has an 8-bit and a 16-bit option. The 16-bit option has the 54 octet cell
format shown in ILJXUH  for the standardized format and in ILJXUH  for the proprietary format.
The 8-bit format has 53 octet without the UDF2 octet. ATM side and PHY side UTOPIA interface
can be configured independently in 8-bit or 16-bit mode.
bit: 15
0
1
2
3
4
:
26
word
)LJXUH 
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VPI(11:0)
VCI(15:12)
VCI(11:0)
PT(2:0) CLP
UDF1
UDF2
Payload Octet 1
Payload Octet 2
Payload Octet 3
Payload Octet 4
:
:
Payload Octet 47
Payload Octet 48
6WDQGDUGL]HG 8723,$ FHOO IRUPDW ELW
DOO ILHOGV DFFRUGLQJ WR VWDQGDUGV XQXVHG RFWHWV VKDGHG
bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
LCI(11:0)
VCI(15:12)
1
VCI(11:0)
PT(2:0) CLP
2 /&, HK(2:0)
PN(2:0)
UDF2
3
Payload Octet 1
Payload Octet 2
4
Payload Octet 3
Payload Octet 4
:
:
:
26
Payload Octet 47
Payload Octet 48
word
)LJXUH  3URSULHWDU\ 8723,$ FHOO IRUPDW ELW
with PN(2:0) = port number for PXB 4220 IWE8 (don’t care for AOP)
HK(2:0) = housekeeping bits (only for Internal Continuity Check ICC)
LCI(13:0) = Logical Connection Identifier
all other fields according to standards, unused octets shaded.
 8723,$ 0XOWL3+< VXSSRUW
To support multi-PHY configurations with and without use of the UTOPIA PHY address the
Infineon Technologies ATM switching chip set supports the Direct Status Polling option of the
UTOPIA Level 2 standard []. It allows the simultaneous polling of up to 4 groups of PHYs by
using 4 CLAVx/ENx signal pairs (x=0..3).
During the transfer of a cell the master UTOPIA interface polls 12 PHY addresses. The 27 clock
cycles time for the transfer of a cell in 16-bit UTOPIA format allows to poll 12 PHY addresses
and to select one of them for the next cell transfer. Receive and transmit UTOPIA interfaces
always poll separately. To allow the support of more than 12 PHYs 4 pairs of CLAVx/ENx lines
are provided in all Infineon Technologies ATM switching chips with UTOPIA interfaces.
Data Sheet
5-136
04.2000