PXB4340E Datasheet, PDF (140/185 Pages) Infineon Technologies AG – ICs for Communications

3;%  (
,QWHUIDFHV
x = U for upstream, D for downstream RAM
RD AT x(3 1:0)
IO ( 31 :0)
3
2
1
0
3;%  (
$23
RADRx(14:0)
RADVx
ROEx
RGWx
RCE3x
RCE2x
RCE1x
RCE0x
RSCx
+3.3 V
+3.3 V
10 kΩ
10 kΩ
A(14:0)
ADV
OE
GW
CLK
CE of RAM No. 3
CE of RAM No. 2
CE of RAM No. 1
CE of RAM No. 0
AD SC
. [ ELW
665$0
ADSP
BWE
SYSCLK
+3.3 V
GND
10 kΩ
1 kΩ
GND
226 Ω
CE2
CE2
BW1
BW2
BW3
BW4
MODE
ZZ
)LJXUH  8SVWUHDP RU GRZQVWUHDP 5$0 ,QWHUIDFH XVLQJ  0ELW 5$0V
Note that RCEx2 is unused and RCEx3 is used as additional address pin adr(15) when using 2
Mbit RAMs.The AOP uses 4-bursts to access the external RAMs. )LJXUH  shows an example
for the read access. During each cell cycle two 4-burst read and two 4-burst write accesses are
made at both up- and downstream RAM. If no cell is to be processed at one of the interfaces a
scan/DMA access or microprocessor access is executed.
Data Sheet
5-140
04.2000