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HD6433802H Datasheet, PDF (97/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer
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3.4.2 Notes on Rewriting Port Mode Registers
When a port mode register is rewritten to switch the functions of external interrupt pins, the
following points should be observed.
When an external interrupt pin function is switched by rewriting the port mode register that
controls pins IRQAEC, IRQ1, IRQ0, WKP7 to WKP0, the interrupt request flag may be set to 1 at
the time the pin function is switched, even if no valid interrupt is input at the pin. Be sure to clear
the interrupt request flag to 0 after switching pin functions. Table 3.5 shows the conditions under
which interrupt request flags are set to 1 in this way.
Table 3.5 Conditions under which Interrupt Request Flag is Set to 1
Interrupt Request
Flags Set to 1
IRR1
IRREC2
IRRI1
IRRI0
IWPR
IWPF7
IWPF6
IWPF5
IWPF4
IWPF3
IWPF2
IWPF1
IWPF0
Conditions
When the edge designated by AIEGS1 and AIEGS0 in AEGSR is input while
IENEC2 in IENRI is set to 1.
When PMRB bit IRQ1 is changed from 0 to 1 while pin IRQ1 is low and IEGR
bit IEG1 = 0.
When PMRB bit IRQ1 is changed from 1 to 0 while pin IRQ1 is low and IEGR
bit IEG1 = 1.
When PMR2 bit IRQ0 is changed from 0 to 1 while pin IRQ0 is low and IEGR
bit IEG0 = 0.
When PMR2 bit IRQ0 is changed from 1 to 0 while pin IRQ0 is low and IEGR
bit IEG0 = 1.
When PMR5 bit WKP7 is changed from 0 to 1 while pin WKP7 is low.
When PMR5 bit WKP6 is changed from 0 to 1 while pin WKP6 is low.
When PMR5 bit WKP5 is changed from 0 to 1 while pin WKP5 is low.
When PMR5 bit WKP4 is changed from 0 to 1 while pin WKP4 is low.
When PMR5 bit WKP3 is changed from 0 to 1 while pin WKP3 is low.
When PMR5 bit WKP2 is changed from 0 to 1 while pin WKP2 is low.
When PMR5 bit WKP1 is changed from 0 to 1 while pin WKP1 is low.
When PMR5 bit WKP0 is changed from 0 to 1 while pin WKP0 is low.
Figure 3.7 shows the procedure for setting a bit in a port mode register and clearing the interrupt
request flag.
When switching a pin function, mask the interrupt before setting the bit in the port mode register.
After accessing the port mode register, execute at least one instruction (e.g., NOP), then clear the
interrupt request flag from 1 to 0. If the instruction to clear the flag is executed immediately after
the port mode register access without executing an intervening instruction, the flag will not be
cleared.
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