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HD6433802H Datasheet, PDF (274/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer
3. Data transfer operations
• SCI3 initialization
Data transfer on SCI3 first of all requires that SCI3 be initialized as described in 10.3.2 3. SCI3
initialization, and shown in figure 10.5.
• Transmitting
Figure 10.11 shows an example of a flowchart for data transmission. This procedure should be
followed for data transmission after initializing SCI3.
Start
Sets bit SPC32 to
1 in SPCR
Read bit TDRE
1
in SSR
No
TDRE = 1?
Yes
Write transmit
data to TDR
2
Continue data
Yes
transmission?
No
Read bit TEND
in SSR
1. Read the serial status register (SSR) and
check that bit TDRE is set to 1, then write
transmit data to the transmit data register
(TDR). When data is written to TDR, bit
TDRE is cleared to 0 automatically, the
clock is output, and data transmission is
started. When clock output is selected,
the clock is output and data transmission
started when data is written to TDR.
2. When continuing data transmission, be
sure to read TDRE = 1 to confirm that
a write can be performed before writing
data to TDR. When data is written to
TDR, bit TDRE is cleared to 0 automatically.
No
TEND = 1?
Yes
Clear bit TE to 0
in SCR3
End
Figure 10.11 Example of Data Transmission Flowchart (Synchronous Mode)
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