HD6433802H Datasheet, PDF (243/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Bit 3: Stop bit length (STOP)
Bit 3 selects 1 bit or 2 bits as the stop bit length in asynchronous mode. The STOP bit setting is
only valid in asynchronous mode. When synchronous mode is selected the STOP bit setting is
invalid since stop bits are not added.
Bit 3
STOP
Description
0
1 stop bit^*1
(initial value)
1
2 stop bits^*2
Notes: 1. In transmission, a single 1 bit (stop bit) is added at the end of a transmit character.
2. In transmission, two 1 bits (stop bits) are added at the end of a transmit character.
In reception, only the first of the received stop bits is checked, irrespective of the STOP bit setting.
If the second stop bit is 1 it is treated as a stop bit, but if 0, it is treated as the start bit of the next
transmit character.
Bit 2: Multiprocessor mode (MP)
Bit 2 enables or disables the multiprocessor communication function. When the multiprocessor
communication function is enabled, the parity settings in the PE and PM bits are invalid. The MP
bit setting is only valid in asynchronous mode. When synchronous mode is selected the MP bit
should be set to 0. For details on the multiprocessor communication function, see 10.3.4,
Multiprocessor Communication Function.
Bit 2
MP
Description
0
Multiprocessor communication function disabled*
1
Multiprocessor communication function enabled*
Note: * For the case where 5-bit data is selected, see table 10.11.
(initial value)
225