HD6433802H Datasheet, PDF (20/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Table 1.1 Features
Item
CPU
Interrupts
Specification
High-speed H8/300L CPU
• General-register architecture
General registers: Sixteen 8-bit registers (can be used as eight 16-bit
registers)
• Operating speed
 Max. operating speed: 8 MHz
 Add/subtract: 0.25 µs (operating at 8 MHz)
 Multiply/divide: 1.75 µs (operating at 8 MHz)
 Can run on 32.768 kHz or 38.4 kHz subclock
• Instruction set compatible with H8/300 CPU
 Instruction length of 2 bytes or 4 bytes
 Basic arithmetic operations between registers
 MOV instruction for data transfer between memory and registers
• Typical instructions
 Multiply (8 bits × 8 bits)
 Divide (16 bits ÷ 8 bits)
 Bit accumulator
 Register-indirect designation of bit position
18 interrupt sources
• 11 external interrupt sources (IRQ₁, IRQ₀, WKP₇ to WKP₀, IRQAEC)
• 7 internal interrupt sources
Clock pulse generators Two on-chip clock pulse generators
• System clock pulse generator: 1.0 to 16 MHz
• Subclock pulse generator: 32.768 kHz, 38.4 kHz
Power-down modes
Seven power-down modes
• Sleep (high-speed) mode
• Sleep (medium-speed) mode
• Standby mode
• Watch mode
• Subsleep mode
• Subactive mode
• Active (medium-speed) mode
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