HD6433802H Datasheet, PDF (86/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Bit 3: Timer FH interrupt request flag (IRRTFH)
Bit 3
IRRTFH
0
1
Description
Clearing conditions:
When IRRTFH = 1, it is cleared by writing 0
(initial value)
Setting conditions:
When TCFH and OCRFH match in 8-bit timer mode, or when TCF (TCFL, TCFH)
and OCRF (OCRFL, OCRFH) match in 16-bit timer mode
Bit 2: Timer FL interrupt request flag (IRRTFL)
Bit 2
IRRTFL
0
1
Description
Clearing conditions:
When IRRTFL= 1, it is cleared by writing 0
Setting conditions:
When TCFL and OCRFL match in 8-bit timer mode
(initial value)
Bit 1: Reserved bit
Bit 1 is reserved; only 0 can be written to this bit.
Bit 0: Asynchronous event counter interrupt request flag (IRREC)
Bit 0
IRREC
0
1
Description
Clearing conditions:
When IRREC = 1, it is cleared by writing 0
(initial value)
Setting conditions:
When ECH overflows in 16-bit counter mode, or ECH or ECL overflows in 8-bit
counter mode
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