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| HD6433802H Datasheet, PDF (329/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer | |||
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Table 13.3 Output Levels
Data
M
Static
1/2 duty
1/3 duty
1/4 duty
Common output
Segment output
Common output
Segment output
Common output
Segment output
Common output
Segment output
0
0
V1
V1
V2, V3
V1
V3
V2
V3
V2
0
1
VSS
VSS
V2, V3
VSS
V2
V3
V2
V3
1
1
0
1
V1
VSS
VSS
V1
V1
VSS
VSS
V1
V1
VSS
VSS
V1
V1
VSS
VSS
V1
M: LCD alternation signal
13.3.3 Operation in Power-Down Modes
In the H8/3802 Series, the LCD controller/driver can be operated even in the power-down modes.
The operating state of the LCD controller/driver in the power-down modes is summarized in table
13.4.
In subactive mode, watch mode, and subsleep mode, the system clock oscillator stops, and
therefore, unless øw, øw/2, or øw/4 has been selected by bits CKS3 to CKS0, the clock will not be
supplied and display will halt. Since there is a possibility that a direct current will be applied to
the LCD panel in this case, it is essential to ensure that øw, øw/2, or øw/4 is selected. In active
(medium-speed) mode, the system clock is switched, and therefore CKS3 to CKS0 must be
modified to ensure that the frame frequency does not change.
311
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