HD6433802H Datasheet, PDF (410/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

IRR1—Interrupt request register 1
H'F6
System control
Bit
7
6
5
4
3
2
1
0
IRRTA —
—
—
— IRREC2 IRRI1 IRRI0
Initial value
0
—
1
—
—
0
0
0
Read/Write
R/W*
W
—
W
W
R/W* R/W* R/W*
IRQ1 to IRQ0 interrupt request flags
0 Clearing conditions:
When IRRIn = 1, it is cleared by writing 0
1 Setting conditions:
When pin IRQn is designated for interrupt
input and the designated signal edge is input
(n = 1 or 0)
IRQAEC interrupt request flag
0 Clearing conditions:
When IRREC2 = 1, it is cleared by writing 0
1 Setting conditions:
When pin IRQAEC is designated for interrupt input and the
designated signal edge is input
Timer A interrupt request flag
0 Clearing conditions:
When IRRTA = 1, it is cleared by writing 0
1 Setting conditions:
When the timer A counter value overflows (from H'FF to H'00)
Note: * Bits 7 and 2 to 0 can only be written with 0, for flag clearing.
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