HD6433802H Datasheet, PDF (297/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

11.2.2 PWM Data Registers U and L (PWDRUm, PWDRLm)
PWDRUm
Bit
7
6
5
4
3
2
1
0
—
—
—
—
—
— PWDRUm1 PWDRUm0
Initial value
1
1
1
1
1
1
0
0
Read/Write
—
—
—
—
—
—
W
W
PWDRLm
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PWDRLm7 PWDRLm6 PWDRLm5 PWDRLm4 PWDRLm3 PWDRLm2 PWDRLm1 PWDRLm0
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
PWDRUm and PWDRLm form a 10-bit write-only register, with the upper 2 bits assigned to
PWDRUm and the lower 8 bits to PWDRLm. The value written to PWDRUm and PWDRLm
gives the total high-level width of one PWM waveform cycle.
When 10-bit data is written to PWDRUm and PWDRLm, the register contents are latched in the
PWM waveform generator, updating the PWM waveform generation data. The 10-bit data should
always be written in the following sequence:
1. Write the lower 8 bits to PWDRLm.
2. Write the upper 2 bits to PWDRUm for the same channel.
PWDRUm and PWDRLm are write-only registers. If they are read, all bits are read as 1.
Upon reset, PWDRUm is initialized to H'FC, and PWDRLm to H'00.
11.2.3 Clock Stop Register 2 (CKSTPR2)
Bit
7
6
5
4
3
2
1
0
—
—
— PW2CKSTP AECKSTP — PW1CKSTP LDCKSTP
Initial value
1
1
1
1
1
1
1
1
Read/Write
—
—
—
R/W
R/W
—
R/W
R/W
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the PWM is described here. For details of the other bits, see the
sections on the relevant modules.
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