HD6433802H Datasheet, PDF (80/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Bit 1: IRQ₁ edge select (IEG1)
Bit 1 selects the input sensing of the IRQ₁ pin.
Bit 1
IEG1
0
1
Description
Falling edge of IRQ₁ pin input is detected
Rising edge of IRQ₁ pin input is detected
(initial value)
Bit 0: IRQ₀ edge select (IEG0)
Bit 0 selects the input sensing of pin IRQ₀.
Bit 0
IEG0
0
1
Description
Falling edge of IRQ₀ pin input is detected
Rising edge of IRQ₀ pin input is detected
(initial value)
2. Interrupt enable register 1 (IENR1)
Bit
Initial value
Read/Write
7
IENTA
0
R/W
6
5
4
— IENWP —
—
0
—
W
R/W
W
3
2
1
0
— IENEC2 IEN1 IEN0
—
0
0
0
W
R/W R/W R/W
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7: Timer A interrupt enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA
0
1
Description
Disables timer A interrupt requests
Enables timer A interrupt requests
(initial value)
Bit 6: Reserved bit
Bit 6 is reserved; only 0 can be written to this bit.
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