HD6433802H Datasheet, PDF (285/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Serial
data
Start
bit
Receive
Stop Start
data (ID1) MPB bit bit
Receive data
Stop Mark state
(Data1) MPB bit (idle state)
1 0 D0 D1
D7 1 1 0 D0 D1
D7 0 1
1
1 frame
1 frame
MPIE
RDRF
RDR
value
LSI
operation
User
processing
ID1
RXI request
MPIE cleared
to 0
RDRF cleared
to 0
RDR data read
No RXI request
RDR retains
previous state
When data is not
this receiver's ID,
bit MPIE is set to
1 again
(a) When data does not match this receiver's ID
Serial
data
Start
bit
Receive
Stop Start
data (ID2) MPB bit bit
Receive data
Stop Mark state
(Data2) MPB bit (idle state)
1 0 D0 D1
D7 1 1 0 D0 D1
D7 0 1
1
1 frame
1 frame
MPIE
RDRF
RDR
value
LSI
operation
User
processing
ID1
ID2
Data2
RXI request
MPIE cleared
to 0
RDRF cleared
to 0
RDR data read
RXI request RDRF cleared
to 0
When data is
this receiver's
ID, reception
is continued
RDR data read
Bit MPIE set to
1 again
(b) When data matches this receiver's ID
Figure 10.20 Example of Operation when Receiving using Multiprocessor Format
(8-bit data, multiprocessor bit, 1 stop bit)
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