HD6433802H Datasheet, PDF (81/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Bit 5: Wakeup interrupt enable (IENWP)
Bit 5 enables or disables WKP₇ to WKP₀ interrupt requests.
Bit 5
IENWP
0
1
Description
Disables WKP₇ to WKP₀ interrupt requests
Enables WKP₇ to WKP₀ interrupt requests
Bits 4 and 3: Reserved bits
Bits 4 and 3 are reserved; only 0 can be written to these bits.
Bit 2: IRQAEC interrupt enable (IENEC2)
Bit 2 enables or disables IRQAEC interrupt requests.
Bit 2
IENEC2
0
1
Description
Disables IRQAEC interrupt requests
Enables IRQAEC interrupt requests
(initial value)
(initial value)
Bits 1 and 0: IRQ₁ and IRQ₀ interrupt enable (IEN1 and IEN0)
Bits 1 and 0 enable or disable IRQ₁ and IRQ₀ interrupt requests.
Bit n
IENn
0
1
Description
Disables interrupt requests from pin IRQn
Enables interrupt requests from pin IRQn
(initial value)
(n = 1 or 0)
3. Interrupt enable register 2 (IENR2)
Bit
7
6
5
IENDT IENAD —
Initial value
0
0
—
Read/Write
R/W
R/W
W
4
3
2
1
0
— IENTFH IENTFL — IENEC
—
0
0
—
0
W
R/W R/W
W
R/W
IENR2 is an 8-bit read/write register that enables or disables interrupt requests.
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