HD6433802H Datasheet, PDF (122/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

5.3.4 Standby Mode Transition and Pin States
When a SLEEP instruction is executed in active (high-speed) mode or active (medium-speed)
mode while bit SSBY is set to 1 and bit LSON is cleared to 0 in SYSCR1, and bit TMA3 is
cleared to 0 in TMA, a transition is made to standby mode. At the same time, pins go to the high-
impedance state (except pins for which the pull-up MOS is designated as on). Figure 5.2 shows
the timing in this case.
ø
Internal data bus
SLEEP instruction fetch Fetch of next instruction
SLEEP instruction execution Internal processing
Pins
Port output
High-impedance
Active (high-speed) mode or active (medium-speed) mode
Standby mode
Figure 5.2 Standby Mode Transition and Pin States
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