HD6433802H Datasheet, PDF (330/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Table 13.4 Power-Down Modes and Display Operation
Mode
Sub- Sub-
Reset Active Sleep Watch active sleep
Module
Standby Standby
Clock ø
Runs Runs
Runs
Stops
Stops
Stops
Stops
Stops^*4
øw
Runs Runs
Runs
Runs
Runs
Runs
Stops^*1 Stops^*4
Display ACT = 0 Stops Stops Stops Stops
Stops
Stops
Stops^*2 Stops
operation ACT = 1 Stops Functions Functions Functions^*3 Functions^*3 Functions^*3 Stops^*2 Stops
Notes: 1. The subclock oscillator does not stop, but clock supply is halted.
2. The LCD drive power supply is turned off regardless of the setting of the PSW bit.
3. Display operation is performed only if øw, øw/2, or øw/4 is selected as the operating
clock.
4. The clock supplied to the LCD stops.
13.3.4 Boosting the LCD Drive Power Supply
When a large panel is driven, the on-chip power supply capacity may be insufficient. If the power
supply capacity is insufficient when V_CC is used as the power supply, the power supply
impedance must be reduced. This can be done by connecting bypass capacitors of around 0.1 to
0.3 µF to pins V₁ to V₃, as shown in figure 13.9, or by adding a split-resistance externally.
R
VCC
V1
R
H8/3802 Series
V2
R
V3
R
VSS
R = several kΩ to
several MΩ
C= 0.1 to 0.3µF
Figure 13.9 Connection of External Split-Resistance
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