HD6433802H Datasheet, PDF (4/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

Section
5.5.2 Clearing
Subsleep Mode
5.6 Subactive Mode
6.3.1 Writing and
Verifying
8.1 Overview
8.2.2 Register
Configuration and
Description
8.3.2 Register
Configuration and
Description
8.3.3 Pin Functions
8.7.2 Register
Configuration and
Description
8.8 Port 9
8.8.2 Register
Configuration and
Description
8.10.2 Register
Configuration and
Description
Page
108
Item
• Clearing by interrupt
Description
Description amended
109
5.6.1 Transition to Subactive Mode Description amended
122
Figure 6.4 High-Speed,High-
Write time t_OPW amended
Reliability Programming Flow Chart
131, 132 Table 8.1 Port Functions
Other function of port 3
and description of port 9
amended
133
Table 8.2 Port 3 Registers
Amended and register
added
134
1. Port data register 3 (PDR3)
2. Port control register 3 (PCR3)
3. Port pull-up control register 3
(PUCR3)
135, 136 4. Port mode register 3 (PMR3)
136
5. Port mode register 2 (PMR2)
139
Table 8.5 Port 4 Register
Bit 0 and description
amended
Bit 0 and description
amended
Bit 0 and description
amended
Bits 5 to 3 and 0, and
description amended
Added
Initial value amended
140, 141 3. Port mode register 2 (PMR2)
141
Table 8.6 Port 4 Pin Functions
155
Table 8.17 Port 8 Registers
Bits 2 and 1, and
description amended
Description amended
Initial value amended
156
1. Port data register 8 (PDR8)
Bits 7 to 1 amended
2. Port control register 8 (PCR8) Bits 7 to 1 amended
158
8.8.1 Overview
Description amended
Table 8.20 Port 9 Registers
Initial value amended
159
2. Port mode register 9 (PMR9) Bit 2 amended, description
added, and Note changed
165
Table 8.26 Port B Register
Initial values added