HD6433802H Datasheet, PDF (114/435 Pages) Hitachi Semiconductor – Single-Chip Microcomputer

5.1.1 System Control Registers
The operation mode is selected using the system control registers described in table 5.3.
Table 5.3 System Control Registers
Name
System control register 1
System control register 2
Abbreviation R/W
SYSCR1
R/W
SYSCR2
R/W
Initial Value
H'07
H'F0
Address
H'FFF0
H'FFF1
1. System control register 1 (SYSCR1)
Bit
7
6
5
4
3
2
SSBY STS2 STS1 STS0 LSON —
Initial value
0
0
0
0
0
1
Read/Write
R/W
R/W R/W
R/W R/W
—
1
MA1
1
R/W
0
MA0
1
R/W
SYSCR1 is an 8-bit read/write register for control of the power-down modes.
Upon reset, SYSCR1 is initialized to H'07.
Bit 7: Software standby (SSBY)
This bit designates transition to standby mode or watch mode.
Bit 7
SSBY
0
1
Description
• When a SLEEP instruction is executed in active mode,
a transition is made to sleep mode
(initial value)
• When a SLEEP instruction is executed in subactive mode, a transition is made to
subsleep mode
• When a SLEEP instruction is executed in active mode, a transition is made to
standby mode or watch mode
• When a SLEEP instruction is executed in subactive mode, a transition is made to
watch mode
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