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MC9S12NE64_06 Datasheet, PDF (475/554 Pages) Freescale Semiconductor, Inc – Microcontrollers
Memory Map and Register Definition
Name1
DBGTBH
Bit 7
R Bit 15
W
6
Bit 14
5
Bit 13
4
Bit 12
3
Bit 11
2
Bit 10
1
Bit 9
Bit 0
Bit 8
DBGTBL
R Bit 7
W
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R TBF
0
DBGCNT
W
CNT
DBGCCX(2)
R
W
PAGSEL
EXTCMP
DBGCCH(2)
R
Bit 15
14
13
12
11
10
W
9
Bit 8
DBGCCL(2)
R
Bit 7
6
5
4
3
2
1
Bit 0
W
DBGC2
BKPCT0
R
BKABEN
W
FULL
BDM
TAGAB BKCEN TAGC RWCEN RWC
DBGC3
BKPCT1
R
BKAMBH BKAMBL BKBMBH BKBMBL RWAEN
W
RWA
RWBEN
RWB
DBGCAX
R
BKP0X
W
PAGSEL
EXTCMP
DBGCAH
BKP0H
R
Bit 15
W
14
13
12
11
10
9
Bit 8
DBGCAL
BKP0L
R
Bit 7
W
6
5
4
3
2
1
Bit 0
DBGCBX
R
BKP1X
W
PAGSEL
EXTCMP
DBGCBH
BKP1H
R
Bit 15
W
14
13
12
11
10
9
Bit 8
DBGCBL
BKP1L
R
Bit 7
W
6
5
4
3
2
1
Bit 0
= Unimplemented or Reserved
Figure 18-3. DBG Register Summary (continued)
1 The DBG module is designed for backwards compatibility to existing BKP modules. Register and bit names have changed from
the BKP module. This column shows the DBG register name, as well as the BKP register name for reference.
2 Comparator C can be used to enhance the BKP mode by providing a third breakpoint.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
475