MC9S12NE64_06 Datasheet, PDF (360/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 12 Ethernet Physical Transceiver (EPHYV2)
TAF10HD — 10BASE-T Half-Duplex
1 = 10BASE-T half-duplex capable
0 = Not 10BASE-T half-duplex capable
12.3.3.6 Auto Negotiation Link Partner Ability (Base Page)
Figure 12-11 shows the contents of the A/N link partner ability register. The register can only be read by
the MI and will be written by the auto-negotiation process when it receives a link code word advertising
the capabilities of the link partner. This register has a dual purpose: exchange of base page information as
shown in Figure 12-11, and exchange of next page information as shown in Figure 12-12.
MII Register Address 5 (%00101) (Base Page)
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
R
NXTP ACK RFLT
TAF[1:0]
FCTL
TAF TAF TAF
100T4 100FD 100HD
TAF
10FD
TAF
10HD
SELECTORFIELD[4:0]
W
RESET: X X X X X X X X X X X X X X X X
= Unimplemented or Reserved
Figure 12-11. Auto Negotiation Link Partner Ability Register (Base Page)
Read:
Write:
NXTP — Next Page
1 = Link partner capable of sending next pages
0 = Link partner not capable of sending next pages
ACK — Acknowledge
1 = Link Partner has received link code word
0 = Link Partner has not received link code word
RFLT — Remote Fault
1 = Remote fault
0 = No remote fault
FLCTL — Flow Control
1 = Advertises implementation of the optional MAC control sublayer and pause function as
specified in IEEE standard clause 31 and anex 31B of 802.3. Setting FLCTL has no effect on
the PHY.
0 = No MAC-based flow control
TAF100T4 — 100BASE-T4 Full-Duplex
1 = Link partner is 100BASE-T4 capable
0 = Link partner is not 100BASE-T4 capable
This function is not implemented in the EPHY.
TAF100FD — 100BASE-TX Full-Duplex
1 = Link partner is 100BASE-TX full-duplex capable
0 = Link partner is not 100BASE-TX full-duplex capable
MC9S12NE64 Data Sheet, Rev. 1.1
360
Freescale Semiconductor