MC9S12NE64_06 Datasheet, PDF (343/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
11.4.6.1 Frame Structure
A transmitted MII management frame uses the MII_MDIO and MII_MDC pins. This frame has the
following format:
<pre><st><op><phyad><regad><ta><data><idle>
11.4.6.1.1 PRE (Preamble)
The preamble (pre) consists of 32 contiguous logic 1 bits on MII_MDIO with 32 corresponding cycles on
MII_MDC to provide the PHY with a pattern that it can use to establish synchronization. The preamble is
optional as determined by NOPRE.
11.4.6.1.2 ST (Start of Frame)
The start of frame (st) is indicated by a <01> pattern. This pattern ensures transitions from the default logic
1 line state to 0 and then returns to 1.
11.4.6.1.3 OP (Operation Code)
The operation code (op) for a read instruction is <10>. For a write operation, the operation code is <01>.
11.4.6.1.4 PHYAD (PHY Address)
The PHY address (phyad) is a 5-bit field, allowing up to 32 unique PHY addresses. The first address bit
transmitted is the MSB of the address.
11.4.6.1.5 REGAD (Register Address)
The register address (regad) is a 5-bit field, allowing 32 individual registers to be addresses within each
PHY. The first register bit transmitted is the MSB of the address.
11.4.6.1.6 TA (Turnaround)
The turnaround (ta) field is a two bit time spacing between the register address field and the data field of
an MII management frame to avoid contention on the MII_MDIO signal during a read operation. For a
read transaction, both the MAC and the PHY remain in a high impedance state for the first bit time of the
turnaround. The PHY drives a 0 bit during the second bit time of the turnaround of a read transaction.
During a write transaction, the MAC drives a 1 bit for the first bit time of the turnaround and a 0 bit for
the second bit time of the turnaround.
11.4.6.1.7 DATA (Data)
The data (data) field is 16 bits wide. The first data bit transmitted and received is the MSB of the data.
11.4.6.1.8 IDLE (IDLE Condition)
During idle condition (idle), MII_MDIO is in the high impedance state.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
343