MC9S12NE64_06 Datasheet, PDF (450/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 17 Background Debug Module (BDMV4)
PLLSEL
1
1
CLKSW
0
1
Table 17-3. BDM Clock Sources
BDMCLK
Alternate clock (refer to the device overview chapter to determine the alternate clock
source)
Bus clock dependent on the PLL
MC9S12NE64 Data Sheet, Rev. 1.1
450
Freescale Semiconductor