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MC9S12NE64_06 Datasheet, PDF (316/554 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 11 Ethernet Media Access Controller (EMACV1)
11.3.2.3 Transmit Control and Status (TXCTS)
Module Base + $4
7
6
5
4
3
2
R
TXACT
0
W
CSLF
PTRC
SSB
0
RESET:
0
0
0
0
0
0
1
0
0
0
TCMD
0
0
= Unimplemented or Reserved
Figure 11-4. Transmit Control and Status (TXCTS)
Read: Anytime.
Write: See each bit description.
TXACT — Transmitter Active Status
This is a read-only status bit that indicates activity in the EMAC transmitter. TXACT is set after a valid
TCMD write and is cleared when the EMAC has finished sending the transmit frame.
1 = Transmitter is active.
0 = Transmitter is idle.
CSLF — Carrier Sense Lost Flag
This status bit is set when the carrier sense (half-duplex mode) drops out or is never sensed during
transmission (excluding the preamble) without collision. The frame is transmitted normally and no
retries are performed as a result of this flag. This flag bit is cleared by writing a 1 to it. A write of 0 has
no effect.
1 = Carrier sense lost has been detected without collision during transmission.
0 = No carrier sense lost has been detected.
PTRC — PAUSE Timer Register Control
This bit can be written anytime.
While set, writes to the PTIME register update the PAUSE duration used in the transmission of a
PAUSE control frame. Reads of the PTIME register return the PAUSE duration used in the
transmission of a hardware-generated PAUSE control frame.
While clear, PTIME register read accesses return the current number of slot times (512 bit times)
remaining in a PAUSE period after the receiver accepts a PAUSE frame. Writes to PTIME are ignored.
1 = PTIME controls the transmit PAUSE duration parameter for PAUSE control frames.
0 = PTIME read accesses return the PAUSE timer counter value.
SSB — Single Slot Backoff
This bit can be written anytime, but the user must not change this bit while TXACT is set.
Setting this bit forces the transmitter to backoff for only a single Ethernet slot time instead of following
the random backoff algorithm. For more information about the backoff algorithm, refer to
Section 11.4.3.3.3, “Backoff Generator.”
1 = Single slot backoff.
0 = Random backoff.
MC9S12NE64 Data Sheet, Rev. 1.1
316
Freescale Semiconductor