MC9S12NE64_06 Datasheet, PDF (137/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
Table 3-4. Pulse Detection Criteria
Mode
Pulse
STOP
STOP¹
Unit
Unit
Ignored
t_pign <= 3 bus clocks
t_pign <= 3.2 µs
Uncertain
3 < t_pulse < 4 bus clocks
3.2 < t_pulse < 10 µs
Valid
t_pval >= 4 bus clocks
t_pval >= 10 µs
1 _{These values include the spread of the oscillator frequency over temperature,}
voltage and process.
t_pulse
Figure 3-48. Pulse Illustration
A valid edge on input is detected if 4 consecutive samples of a passive level are followed by 4 consecutive
samples of an active level directly or indirectly.
The filters are continuously clocked by the bus clock in RUN and WAIT mode. In STOP mode the clock
is generated by a single RC oscillator in the Port Integration Module. To maximize current saving the RC
oscillator runs only if the following condition is true on any pin:
Sample count <= 4 and port interrupt enabled (PIE=1) and port interrupt flag not set (PIF=0).
3.4.9 Port H
The EMAC module is connected to port H.
Port H pins PH[6:0] can be used either for general-purpose I/O or with the EMAC subsystems. Further the
keypad wake-up function is implemented on pins H[6:0].
Port H offers the same interrupt features as on port G.
During reset, port H pins are configured as high-impedance inputs.
3.4.10 Port J
The EMAC and IIC modules are connected to port J.
Port J pins PJ[7:6] can be used either for general-purpose I/O or with the IIC subsystem. Port J pins PJ[3:0]
can be used either for general-purpose I/O or with the EMAC subsystems. Further the Keypad Wake-Up
function is implemented on pins H[6:0].
Port J offers the same interrupt features as on port G.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
137