MC9S12NE64_06 Datasheet, PDF (341/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
not masked (corresponding receive buffer overrun interrupt enable bit is set to 1), the EMAC generates an
overrun interrupt. In the receive buffer overrun event, buffer storage is halted and adjacent storage buffers
are not corrupted.
11.4.4.2 Transmit Ethernet Buffer
Only the destination address (DA), the source address (SA), the type/length field, and the data field must
be stored in the transmit Ethernet buffer. The transmitter automatically appends the frame check sequence.
It also automatically appends pad data to extend the data length to 46 bytes if the data length of the frame
written to the transmit buffer is less than the minimum data length. The value of the transmit end-of-frame
pointer must correspond to the last byte in the data field byte, not including pad data.
11.4.5 Full-Duplex Operation
The IEEE 802.3x standard defines a second mode of operation, called full duplex, that bypasses the
CSMA/CD (carrier sense multiple access/collision detect) protocol. The CSMA/CD protocol is half
duplex, meaning two or more network nodes share a common transmission medium implying that a
network node may either transmit data, or receive data, but never both at the same time. Full-duplex mode
allows exactly two network nodes to simultaneously exchange data over a point-to-point link that provides
independent transmit and receive paths. Because each network node can simultaneously transmit and
receive data, the aggregate throughput of the link is effectively doubled. Because there is no contention for
a shared medium, collisions cannot occur and the CSMA/CD protocol is unnecessary.
11.4.5.1 MAC Flow Control
Full-duplex mode includes an optional flow control mechanism for real-time control and manipulation of
the frame transmission and reception process. This mechanism allows a receiving node that is becoming
congested to request the sending node to stop sending frames for a selected short period of time. This is
performed through the use of a PAUSE frame. If the congestion is relieved before the requested wait has
expired, a second PAUSE frame with a zero time-to-wait value can be sent to request resumption of
transmission.
MAC control frames are identified by the exclusive assigned type value of 0x8808 (hex). They contain
operational codes (opcodes) in the first two bytes of the data field. The MAC control opcode field for a
PAUSE command is 0x0001 (hex). The next two bytes of the data field are the MAC control parameters
field, which is a 16-bit value that specifies the duration of the PAUSE event in units of 512 bit times. Valid
values are 0x0000 to 0xFFFF (hex). If an additional PAUSE frame arrives before the current PAUSE time
has expired, its parameter replaces the current PAUSE time, so a PAUSE frame with parameter 0 allows
traffic to resume immediately. A 42-byte reserved field (transmitted as all 0s) is required to pad the length
of the PAUSE frame to the minimum Ethernet frame size. The destination address of the PAUSE frame
must be set to the globally assigned multicast address 01-80-C2-00-00-01 (hex) or to the unique DA. This
multicast address has been reserved by the IEEE 802.3 standard for use in MAC control PAUSE frames.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
341