MC9S12NE64_06 Datasheet, PDF (106/554 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 3 Port Integration Module (PIM9NE64V1)
Port Integration Module
PJ6
PJ7
PJ0
PJ1
PJ2
PJ3
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
KWJ6
KWJ7
KWJ0
KWJ1
KWJ2
KWJ3
KWG0
KWG1
KWG2
KWG3
KWG4
KWG5
KWG6
KWG7
IIC_SDA _IIC
IIC_SCL
MII_MDC
MII_MDIO
MII_CRS
MII_COL
MII_RXD0
MII_RXD1
MII_RXD2
MII_RXD3
MII_RXCLK
MII_RXDV
MII_RXER
EMAC
Ethernet
Media
Access
Controller
ACTLED
LNKLED
SPDLED
DUPLED
COLLED
MII
100Base-TX
10Base-T
Physical
Transceiver(EPHY)
TIM_IOC4
TIM
TIM_IOC5
TIM_IOC6
TIM_IOC7
KWH0
KWH1
KWH2
KWH3
KWH4
KWH5
KWH6
MII_TXD0
MII_TXD1
MII_TXD2
MII_TXD3
MII_TXCLK
MII_TXEN
MII_TXER
ADDR0/DATA0
ADDR1/DATA1
ADDR2/DATA2
ADDR3/DATA3
ADDR4/DATA4
ADDR5/DATA5
ADDR6/DATA6
ADDR7/DATA7
ADDR8/DATA8
ADDR9/DATA9
ADDR10/DATA10
ADDR11/DATA11
ADDR12/DATA12
ADDR13/DATA13
ADDR14/DATA14
ADDR15/DATA15
SCI0^{SSCCIIOO__RTXXDD}
SCI1
SCI1_RXD
SCI1_TXD
SPI_MISO
SPI_MOSI
SPI _{SPI_SCK}
SPI_SS
BKGD/MODC/TAGHI
XIRQ
IRQ
R/W
LSTRB/TAGLO
ECLK
IPIPE0/MODA
IPIPE1/MODB
NOACC
CORE
XADDR14
XADDR15
XADDR16
XADDR17
XADRR18
XADDR19
XCS
ECS/ROMCTL
Figure 3-1. PIM_9NE64 Block Diagram
3.1.1 Features
A standard port has the following minimum features:
• Input/output selection
MC9S12NE64 Data Sheet, Rev. 1.1
106
PL0
PL1
PL2
PL3
PL4
PL5
PL6
PT4
PT5
PT6
PT7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
BKGD
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
Freescale Semiconductor