EP7211 Datasheet, PDF (159/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
;
ArmMmuFlushIdc
CN
0x07
;InitialMmuConfig
EQU
+ArmMmuControl32BitDataEnable
+ArmMmuControlBigEndianEnable
ArmMmuControl32BitCodeEnable
+ArmMmuControlMandatory
InitialMmuConfig
EQU
ArmMmuControl32BitCodeEnable
+ArmMmuControl32BitDataEnable +ArmMmuControlMandatory ;leave as little endian
11/6/96 ks
;==============================================================================
======
;
REAL CODE START
;
set little endian, 32bit code, 32bit data by writing to CP15’s control
register
LDR
r0, =InitialMmuConfig
MCR
ArmMmuCP, 0, r0, ArmMmuControl, c0
;
set the cpu to SVC32 mode
MRS
BIC
ORR
MSR
;
r0, CPSR
r0, r0, #ArmMaskMode
r0, r0, #ArmSVCMode
CPSR, r0
;read psr
;remove the mode bits
;set to supervisor 32 bit mode
; Now set the CPU into the new mode
;
initialize HW control
UARTEnable
LDR
r12,=HwBaseAddress
MOV
r0,#HwControlUartEnable
;Enable UART
STR
r0,[r12,#HwControl]
LDR
r1,=HwStatus2
ADD
r1,r1,r12
LDR
r2,[r1]
;read system flag2
TST
r2,#CLKMOD
LDREQ r0,=UartValue
;load 18 mhz value if bit not set
LDRNE r0,=UartValue_13
;load 13 mhz value if bit set
STR
DS352PP3
JUL 2001
r0,[r12,#HwUartControl]
;initialise Uart
159
Appendix A: Boot Code