EP7211 Datasheet, PDF (146/166 Pages) Cirrus Logic – HIGH-PERFORMANCE ULTRA-LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER

EP7211
High-Performance Ultra-Low-Power System-on-Chip with LCD Controller
EXPCLK
DRA[12:0]
NRAS[1:0]
NCAS[3:0]
Held
W_&6$
W_5&
W_5$6
Row
Col
D[31:0]
NMOE
Held
NMWE
Figure 6-11. DRAM CAS Before RAS Refresh Cycle at 36 MHz
NOTES:
1) t_CSA (CAS set-up time) = 8 ns max
2) t_RAS (RAS pulse width) = 60 ns max
3) t_RC (cycle time) = 167 ns max
When DRAMs are placed in self-refresh (entering the Standby State), the same timings, except that
t_RAS is extended indefinitely.
146
Electrical Specifications
DS352PP3
JUL 2001