Z80382 Datasheet, PDF (9/77 Pages) Zilog, Inc. – HIGH-PERFORMANCE DATA COMMUNICATIONS PROCESSORS

Zilog
Z80382/Z8L382
High-Performance Data Communications Processors
Table 3. DC Electrical Characteristics
Symbol
V_IH
Item
Input High Voltage
Condition
Min.
Typ.
Max.
Unit
See Table 2
V
1
V_IL
Input Low Voltage
See Table 2
V
V_OH
Output High Voltage
See Table 1
V
V_OL
Output Low Voltage
I_IL
Input Leakage
Current, All Inputs
Except CLKI, CLKO
V_IN = 0.5V to
V_DD - 0.5V
See Table 1
V
1.0
mA
I_TL
Tri-State Leakage
Current
V_IN = 0.5 to
V_DD - 0.5
1.0
mA
I_DD
V_DD Supply Current ^{(1, 3)}
BUSCLK = 10 MHz
Normal Operation
V_DD = 3.3V
75
mA
BUSCLK = 10 MHz
90
mA
V_DD = 5V
BUSCLK = 20 MHz
150
mA
V_DD = 5V
I_DDS
V_DD Supply Current
BUSCLK = 10 MHz
Standby Mode ^{(1, 2, 3)}
V_DD = 3.3V
BUSCLK = 10 MHz
50
mA
50
mA
V_DD = 5V
BUSCLK = 20 MHz
50
mA
V_DD = 5V
Notes:
1. V_IH min = V_DD-1.0V, V_IL max = 0.8V. All output terminals are at no load.
2. On-chip peripherals with independent clocks are inactive (not being clocked).
3. BUSCLK is the internal processor clock frequency.
DS97Z382000
PRELIMINARY
9