Z80382 Datasheet, PDF (44/77 Pages) Zilog, Inc. – HIGH-PERFORMANCE DATA COMMUNICATIONS PROCESSORS

Z80382/Z8L382
High-Performance Data Communications Processors
HOST INTERFACE (Continued)
Each PnP card manufactured must have a non-zero 64-bit
identity value that is divided into a 16-bit vendor ID, a 16-
bit product ID including revision, and a 32-bit serial num-
ber. 380C firmware has complete control of this number;
no mechanism for storing or determining it is included in
the PnP interface.
After sending an Initiation key, the Host can only access a
few of these registers in a defined sequence, called the
Isolation protocol, which selects the PnP card with the 64-
bit value having the most low-order ones, among those in
the system. The timing requirements of the Isolation proto-
col are quite slow compared to the speed of the 380C pro-
cessor, and the 64-bit ID and an associated 8-bit check-
sum are sequenced to the PnP interface by the 380C, on
a polled or interrupt-driven basis.
After ÒisolatingÓ a card by means of the Isolation protocol,
host software assigns the ÒisolatedÓ card a ÒCard Select
NumberÓ (CSN), starting with 01H and ascending for sub-
sequent cards. Assigning a CSN eliminates the card from
future repetitions of the protocol. Then, or later, host soft-
ware reads the characteristics of the card, called the Re-
source Data, in a handshake manner with 380C firmware.
Host software repeats this process until it determines that
it has seen all of the PnP cards in the system. Then it allo-
cates resources including memory and I/O space address-
es, interrupt levels, and DMA channels, and uses the var-
ious cardsÕ CSNs to write these allocations to
ÒConfiguration registersÓ in the PnP register space.
Finally, host software places all the PnP interfaces in the
system back in ÒWait for KeyÓ state, in which they perform
address decoding and interface the interrupt and DMA re-
quests and acknowledgments, but have no affect on other
system operations. If the host software thereafter deter-
mines that the system needs reconfiguring, it sends anoth-
er Initiation key. In this case, however, it can address a
specific card using the previously assigned CSN.
Zilog
Configuration Registers
The following Configuration registers are implemented in
the Z382 to provide for the resources required by the host
to interface to the host-accessible functions within the
chip:
Ð I/O Mailbox I/O Address
Ð Mimic I/O Address
Ð Interrupt Request Level - can be selected to be
output on either of the two available interrupt
output lines. A unique Z382 feature allows these
two pins to be conÞgured to be any two of the ISA-
bus interrupt lines.
Ð DMA Channel 0, DMA Channel 1 - A unique Z382
feature allows the two DMA pin pairs to be
conÞgured to be any two of the seven ISA-bus
DMA channels.
Host writes to the Configuration registers are effective im-
mediately, in hardware, so there is no urgent need for the
380C processor to ÒtranslateÓ them into other register val-
ues. But the 380C processor can use the interrupt that oc-
curs when the Host terminates Configuration state to ex-
amine what the Host has done to the Configuration
registers, and operate accordingly in the future.
PCMCIA Interface
The PCMCIA Interface block integrates all the functions
necessary for the operation of I/O interface cards in a PC-
MCIA 2.0 and 3.0 socket. These functions are:
Ð PCMCIA Interface Control
Ð Attribute Memory
Ð ConÞguration Registers
Ð I/O Interface
Ð ConÞgurable Address Decoder
Ð ConÞgurable Interrupt Logic
Ð Z380 Interface
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PRELIMINARY
DS97Z382000