Z80382 Datasheet, PDF (70/77 Pages) Zilog, Inc. – HIGH-PERFORMANCE DATA COMMUNICATIONS PROCESSORS

Z80382/Z8L382
High-Performance Data Communications Processors
Z80382 ASCI, PRT, CSIO, WDT REGISTERS (Continued)
Register Name
Timer Data Register Ch 1L
Timer Data Register Ch 1H
Reload Register Ch 1L
Reload Register Ch 1H
ASCI0 Time Constant Low
ASCI0 Time Constant High
ASCI1 Time Constant Low
ASCI1 Time Constant High
WDT Master Register
WDT Command Register
PORT AND NEW Z80382 REGISTERS
Register Name
IOCS1 Low Register
IOCS1 High Register
IOCS2 Low Register
IOCS2 High Register
RAM Low Register
RAM High Register
ROM Low Register
ROM High Register
Memory Mode Register 1
Memory Mode Register 2
System ConÞguration Register
Pin Multiplexing Register
ASCI0 DMA Control Register
ASCI1 DMA Control Register
Output Drive Control Register
INT3-1 Control Register
Port A Data Register
Port A Data Direction Register
Port B Data Register
Port B Data Direction Register
Port C Data Register
Port C Data Direction Register
Port D Data Register
Port D Data Direction Register
I/O Address
%0014
%0015
%0016
%0017
%001A
%001B
%001C
%001D
%0028
%0029
I/O Address
%002A
%002B
%002C
%002D
%002E
%002F
%0030
%0031
%0032
%00D3
%0036
%0037
%0038
%0039
%003A
%003B
%00EE
%00ED
%00E5
%00E4
%00DE
%00DD
%00E8
%00E7
Zilog
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
70
PRELIMINARY
DS97Z382000