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Z80382 Datasheet, PDF (13/77 Pages) Zilog, Inc. – HIGH-PERFORMANCE DATA COMMUNICATIONS PROCESSORS
Zilog
Z80382/Z8L382
High-Performance Data Communications Processors
Host - PCMCIA Attribute Memory Write Timing (See Figure 6)
Specifications apply over Standard Operating Conditions unless otherwise noted. CL = 50 pF for outputs.
Z80382
Z8L382
1
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
t34 Address Setup to /PCCE1 Fall
30
t35 Address Setup to /PCWE Fall
30
t36 Address Hold from /PCCE1 High
10
t37 Address Hold from /PCWE High
10
t38 Data Setup to /PCCE1 Rise
20
t39 Data Setup to /PCWE Rise
20
t40 Data Hold from /PCCE1 High
10
t41 Data Hold from /PCWE High
10
35
ns
35
ns
10
ns
10
ns
20
ns
20
ns
10
ns
10
ns
Note: Timings also apply for writes to registers located in the attribute memory space.
HA9-0
PCREG
/PCCE1
/PCWE
HD7-0
t34
t35
t37
t36
t40
t38
t41
t39
Figure 6. Host - PCMCIA Attribute Memory Write Timing
DS97Z382000
PRELIMINARY
13