DS003-1 Datasheet, PDF (61/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

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Virtex™ 2.5 V Field Programmable Gate Arrays
Table 4: Virtex Pinout Tables (Fine-Pitch BGA) (Continued)
Pin Name
Device
FG256
FG456
V_REF, Bank 1
(VREF pins are listed
incrementally. Connect
all pins listed for both
the required device and
all smaller devices
listed in the same
package.)
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
B9, C11
... + E11
... + A14
N/A
N/A
N/A
A18, B13, E14
... + A19
N/A
N/A
Within each bank, if
input reference voltage
XCV800
N/A
N/A
is not required, all V_REF
XCV1000
N/A
N/A
pins are general I/O.
V_REF, Bank 2
(V_REF pins are listed
incrementally. Connect
all pins listed for both
the required device and
all smaller devices
listed in the same
package.)
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
F13, H13
... + F14
... + E13
N/A
N/A
F21, H18, K21
... + D22
N/A
N/A
N/A
Within each bank, if
input reference voltage
XCV800
N/A
N/A
is not required, all V_REF
XCV1000
N/A
N/A
pins are general I/O.
V_REF, Bank 3
(V_REF pins are listed
incrementally. Connect
all pins listed for both
the required device and
all smaller devices
listed in the same
package.)
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
K16, L14
... + L13
... + M13
N/A
N/A
N21, R19, U21
... + U20
N/A
N/A
N/A
Within each bank, if
input reference voltage
XCV800
N/A
N/A
is not required, all V_REF
XCV1000
N/A
N/A
pins are general I/O.
FG676
N/A
N/A
N/A
A14, C20, C21,
D15, G16
... + B19
... + A17
N/A
N/A
N/A
N/A
F24, H23, K20,
M23, M26
... + G26
... + K25
N/A
N/A
N/A
N/A
R23, R25, U21,
W22, W23
... + W26
... + U25
N/A
FG680
N/A
N/A
N/A
N/A
B6, B8, B18,
D11, D13, D17
... + B14
... + B5
N/A
N/A
N/A
N/A
G1, H4, J1, L2,
V5, W3
... + N1
... + D2
N/A
N/A
N/A
N/A
AC1, AJ2, AK3,
AL4, AR1, Y1
... + AF3
... + AP4
DS003-4 (v2.8) July 19, 2002
Production Product Specification
www.xilinx.com
1-800-255-7778
Module 4 of 4
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