DS003-1 Datasheet, PDF (38/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

Virtex™ 2.5 V Field Programmable Gate Arrays
R
CLB Arithmetic Switching Characteristics
Setup times not listed explicitly can be approximated by decreasing the combinatorial delays by the setup time adjustment
listed. Precise values are provided by the timing analyzer.
Speed Grade
Description
Symbol
Min
-6
-5
-4
Units
Combinatorial Delays
F operand inputs to X via XOR
F operand input to XB output
F operand input to Y via XOR
F operand input to YB output
F operand input to COUT output
G operand inputs to Y via XOR
G operand input to YB output
G operand input to COUT output
BX initialization input to COUT
CIN input to X output via XOR
CIN input to XB
CIN input to Y via XOR
CIN input to YB
CIN input to COUT output
Multiplier Operation
T_OPX
T_OPXB
T_OPY
T_OPYB
T_OPCYF
T_OPGY
T_OPGYB
T_OPCYG
T_BXCY
T_CINX
T_CINXB
T_CINY
T_CINYB
T_BYP
0.37
0.8
0.9
1.0 ns, max
0.54
1.1
1.3
1.4 ns, max
0.8
1.5
1.7
2.0 ns, max
0.8
1.5
1.7
2.0 ns, max
0.6
1.2
1.3
1.5 ns, max
0.46
1.0
1.1
1.2 ns, max
0.8
1.6
1.8
2.1 ns, max
0.7
1.3
1.4
1.6 ns, max
0.41
0.9
1.0
1.1 ns, max
0.21
0.41
0.46
0.53 ns, max
0.02
0.04
0.05
0.06 ns, max
0.23
0.46
0.52
0.6 ns, max
0.23
0.45
0.51
0.6 ns, max
0.05
0.09
0.10
0.11 ns, max
F1/2 operand inputs to XB output via AND
F1/2 operand inputs to YB output via AND
F1/2 operand inputs to COUT output via AND
G1/2 operand inputs to YB output via AND
G1/2 operand inputs to COUT output via AND
Setup and Hold Times before/after Clock CLK⁽¹⁾
T_FANDXB
T_FANDYB
T_FANDCY
T_GANDYB
T_GANDCY
0.18
0.36
0.40
0.46 ns, max
0.40
0.8
0.9
1.1 ns, max
0.22
0.43
0.48
0.6 ns, max
0.25
0.50
0.6
0.7 ns, max
0.07
0.13
0.15
0.17 ns, max
Setup Time / Hold Time
CIN input to FFX
T_CCKX/T_CKCX 0.50 / 0 1.0 / 0 1.2 / 0 1.3 / 0 ns, min
CIN input to FFY
T_CCKY/T_CKCY 0.53 / 0 1.1 / 0 1.2 / 0 1.4 / 0 ns, min
Notes:
1. A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
Module 3 of 4
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DS003-3 (v3.2) September 10, 2002
Production Product Specification