DS003-1 Datasheet, PDF (6/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

Virtex™ 2.5 V Field Programmable Gate Arrays
R
T
DQ
TCE
CE
SR
Weak
Keeper
O
OCE
I
IQ
SR
CLK
ICE
DQ
CE
SR
OBUFT
QD
CE
SR
Programmable
Delay
IBUF
Vref
Figure 2: Virtex Input/Output Block (IOB)
PAD
ds022_02_091300
Table 1: Supported Select I/O Standards
I/O Standard
LVTTL 2 – 24 mA
Input Reference
Voltage (V_REF)
N/A
LVCMOS2
N/A
PCI, 5 V
N/A
PCI, 3.3 V
N/A
GTL
0.8
GTL+
1.0
HSTL Class I
0.75
HSTL Class III
0.9
HSTL Class IV
0.9
SSTL3 Class I &II
1.5
SSTL2 Class I & II
1.25
CTT
1.5
AGP
1.32
Output Source
Voltage (V_CCO)
3.3
2.5
3.3
3.3
N/A
N/A
1.5
1.5
1.5
3.3
2.5
3.3
3.3
Board Termination
Voltage (V_TT)
N/A
N/A
N/A
N/A
1.2
1.5
0.75
1.5
1.5
1.5
1.25
1.5
N/A
5 V Tolerant
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
Module 2 of 4
2
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DS003-2 (v2.8.1) December 9, 2002
Product Specification