DS003-1 Datasheet, PDF (56/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

Virtex™ 2.5 V Field Programmable Gate Arrays
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Table 3: Virtex Pinout Tables (BGA) (Continued)
Pin Name
Device
V_CCO, Bank 7
All
V_REF, Bank 0
(VREF pins are listed
incrementally. Connect all
pins listed for both the
required device and all
smaller devices listed in the
same package.)
Within each bank, if input
reference voltage is not
required, all V_REF pins are
general I/O.
V_REF, Bank 1
(VREF pins are listed
incrementally. Connect all
pins listed for both the
required device and all
smaller devices listed in the
same package.)
Within each bank, if input
reference voltage is not
required, all V_REF pins are
general I/O.
V_REF, Bank 2
(V_REF pins are listed
incrementally. Connect all
pins listed for both the
required device and all
smaller devices listed in the
same package.)
Within each bank, if input
reference voltage is not
required, all V_REF pins are
general I/O.
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
XCV800
XCV1000
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
XCV800
XCV1000
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
XCV800
XCV1000
BG256
G4, H4
A8, B4
... + A4
... + A2
N/A
N/A
N/A
N/A
A17, B12
... + B15
... + B17
N/A
N/A
N/A
N/A
C20, J18
... + F19
... + G18
N/A
N/A
N/A
N/A
BG352
G23, K26,
N23
N/A
A16,C19,
C21
... + D21
N/A
N/A
N/A
N/A
N/A
B6, C9,
C12
... + D6
N/A
N/A
N/A
N/A
N/A
E2, H2,
M4
... + D2
N/A
N/A
N/A
N/A
BG432
A31, L28, L31
N/A
N/A
BG560
C32, D33, K33,
N32, T33
N/A
N/A
B19, D22, D24,
D26
... + C18
... + C24
... + B21
N/A
N/A
N/A
N/A
A19, D20,
D26, E23, E27
... + E24
... + E21
... + D29
N/A
N/A
A13, B7,
C6, C10
... + B15
... + D10
... + B12
N/A
N/A
N/A
N/A
A6, D7,
D11, D16, E15
... + D10
... + D13
... + E7
N/A
N/A
E2, G3,
J2, N1
... + R3
... + H1
... + M3
N/A
N/A
G5, H4,
L5, P4, R1
... + K5
... + N5
... + B3
Module 4 of 4
8
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DS003-4 (v2.8) July 19, 2002
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