DS003-1 Datasheet, PDF (27/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

R
Virtex™ 2.5 V Field Programmable Gate Arrays
DC Characteristics Over Recommended Operating Conditions
Symbol
Description
Device
Min Max Units
V_DRINT
Data Retention V_CCINT Voltage
(below which configuration data can be lost)
All
2.0
V
V_DRIO
Data Retention V_CCO Voltage
(below which configuration data can be lost)
All
1.2
V
I_CCINTQ Quiescent V_CCINT supply current^(1,3)
XCV50
XCV100
50
mA
50
mA
XCV150
50
mA
XCV200
75
mA
XCV300
75
mA
XCV400
75
mA
XCV600
100 mA
XCV800
100 mA
XCV1000
100 mA
I_CCOQ Quiescent V_CCO supply current⁽¹⁾
XCV50
XCV100
2
mA
2
mA
XCV150
2
mA
XCV200
2
mA
XCV300
2
mA
XCV400
2
mA
XCV600
2
mA
XCV800
2
mA
XCV1000
2
mA
I_REF
I_L
C_IN
I_RPU
V_REF current per V_REF pin
Input or output leakage current
Input capacitance (sample tested)
BGA, PQ, HQ, packages
Pad pull-up (when selected) @ V_in = 0 V, V_CCO = 3.3 V (sample
tested)
All
20
µA
All
–10 +10 µA
All
8
pF
All
Note (2) 0.25 mA
I_RPD Pad pull-down (when selected) @ V_in = 3.6 V (sample tested)
Note (2) 0.15 mA
Notes:
1. With no output current loads, no active input pull-up resistors, all I/O pins 3-stated and floating.
2. Internal pull-up and pull-down resistors guarantee valid logic levels at unconnected input pins. These pull-up and pull-down resistors
do not guarantee valid logic levels when input pins are connected to other circuits.
3. Multiply I_CCINTQ limit by two for industrial grade.
DS003-3 (v3.2) September 10, 2002
Production Product Specification
www.xilinx.com
1-800-255-7778
Module 3 of 4
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