DS003-1 Datasheet, PDF (53/76 Pages) Xilinx, Inc – Fast, high-density Field-Programmable Gate Arrays

R
Virtex™ 2.5 V Field Programmable Gate Arrays
Table 2: Virtex Pinout Tables (Chip-Scale and QFP Packages) (Continued)
Pin Name
Device
CS144
TQ144
PQ/HQ240
V_REF, Bank 6
(V_REF pins are listed
incrementally. Connect
all pins listed for both
the required device
and all smaller devices
listed in the same
package.)
Within each bank, if
input reference voltage
is not required, all
V_REF pins are general
I/O.
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
XCV800
H2, K1
... + J3
N/A
N/A
N/A
N/A
116, 123
... + 118
N/A
N/A
N/A
N/A
36, 50
... + 47
... + 54
... + 33
... + 48
... + 40
V_REF, Bank 7
(V_REF pins are listed
incrementally. Connect
all pins listed for both
the required device
and all smaller devices
listed in the same
package.)
Within each bank, if
input reference voltage
is not required, all
V_REF pins are general
I/O.
XCV50
XCV100/150
XCV200/300
XCV400
XCV600
XCV800
D4, E1
... + D2
N/A
N/A
N/A
N/A
133, 140
... + 138
N/A
N/A
N/A
N/A
9, 23
... + 12
... + 5
... + 26
... + 11
... + 19
GND
All
A1, B9, B11, C7, 9, 18, 26, 35, 46, 54, 64, 1, 8, 14, 22, 29, 37, 45, 51,
D5, E4, E11, F1, 75, 83, 91, 100, 111, 120, 59, 69, 75, 83, 91, 98, 106,
G10, J1, J12, L3,
129, 136, 144,
112, 119, 129, 135, 143,
L5, L7, L9, N12
151, 158, 166, 172, 182,
190, 196, 204, 211, 219,
227, 233
DS003-4 (v2.8) July 19, 2002
Production Product Specification
www.xilinx.com
1-800-255-7778
Module 4 of 4
5