LM3S5D91 Datasheet, PDF (990/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Universal Serial Bus (USB) Controller
If this register is changed after packets have been sent from the endpoint, the transmit endpoint
FIFO must be completely flushed (using the FLUSH bit in USBTXCSRLn) after writing the new value
to this register.
Note: USBTXMAXPn must be set to an even number of bytes for proper interrupt generation in
µDMA Basic Mode.
USB Maximum Transmit Data Endpoint 1 (USBTXMAXP1)
Base 0x4005.0000
Offset 0x110
Type R/W, reset 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
MAXLOAD
Type RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
15:11
10:0
Name
reserved
MAXLOAD
Type
RO
R/W
Reset
0x0
0x000
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Maximum Payload
This field specifies the maximum payload in bytes per transaction.
990
January 22, 2012
Texas Instruments-Production Data