LM3S5D91 Datasheet, PDF (197/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
Note: When the ADC module is in operation, the system clock must be at least 16 MHz. When
the USB module is in operation, MOSC must be the clock source, either with or without
using the PLL, and the system clock must be at least 30 MHz.
Figure 5-5. Main Clock Tree
XTAL^a
USBPWRDN^c
USB PLL
(480 MHz)
÷4
RXINT
RXFRAC
TXINT
TXFRAC
USB Clock
I²S Receive MCLK
I²S Transmit MCLK
USEPWMDIV ^a
MOSCDIS ^a
Main OSC
XTAL^a
PWRDN ^b
PLL
(400 MHz)
IOSCDIS^a
Precision
Internal OSC
(16 MHz)
Internal OSC
(30 kHz)
Hibernation
OSC
(32.768 kHz)
÷4
OSCSRC ^b,d
PWMDW ^a
PWM Clock
DIV400 ^c
÷2
USESYSDIV ^a,d
SYSDIV ^e
BYPASS ^b,d
PWRDN
System Clock
ADC Clock
÷ 25
a. Control provided by RCC register bit/field.
b. Control provided by RCC register bit/field or RCC2 register bit/field, if overridden with RCC2 register bit USERCC2.
c. Control provided by RCC2 register bit/field.
d. Also may be controlled by DSLPCLKCFG when in deep sleep mode.
e. Control provided by RCC register SYSDIV field, RCC2 register SYSDIV2 field if overridden with USERCC2 bit, or
[SYSDIV2,SYSDIV2LSB] if both USERCC2 and DIV400 bits are set.
Note: The figure above shows all features available on all Stellaris® Firestorm-class microcontrollers. Not all peripherals
may be available on this device.
January 22, 2012
197
Texas Instruments-Production Data