LM3S5D91 Datasheet, PDF (16/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Table of Contents
Table 7-7.
Table 7-8.
Table 7-9.
Table 7-10.
Table 7-11.
Table 7-12.
Table 7-13.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Table 8-5.
Table 8-6.
Table 8-7.
Table 8-8.
Table 8-9.
Table 8-10.
Table 8-11.
Table 8-12.
Table 9-1.
Table 9-2.
Table 9-3.
Table 9-4.
Table 9-5.
Table 9-6.
Table 9-7.
Table 9-8.
Table 10-1.
Table 10-2.
Table 10-3.
Table 10-4.
Table 10-5.
Table 10-6.
Table 10-7.
Table 10-8.
Table 10-9.
Table 10-10.
Table 10-11.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 12-4.
Table 12-5.
Table 13-1.
Table 13-2.
Table 13-3.
Channel Control Structure Offsets for Channel 30 ................................................ 356
Channel Control Word Configuration for Memory Transfer Example ...................... 356
Channel Control Structure Offsets for Channel 7 .................................................. 357
Channel Control Word Configuration for Peripheral Transmit Example .................. 358
Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 359
Channel Control Word Configuration for Peripheral Ping-Pong Receive
Example ............................................................................................................ 360
μDMA Register Map .......................................................................................... 362
GPIO Pins With Non-Zero Reset Values .............................................................. 401
GPIO Pins and Alternate Functions (100LQFP) ................................................... 401
GPIO Pins and Alternate Functions (108BGA) ..................................................... 403
GPIO Pad Configuration Examples ..................................................................... 410
GPIO Interrupt Configuration Example ................................................................ 411
GPIO Pins With Non-Zero Reset Values .............................................................. 412
GPIO Register Map ........................................................................................... 412
GPIO Pins With Non-Zero Reset Values .............................................................. 425
GPIO Pins With Non-Zero Reset Values .............................................................. 431
GPIO Pins With Non-Zero Reset Values .............................................................. 433
GPIO Pins With Non-Zero Reset Values .............................................................. 436
GPIO Pins With Non-Zero Reset Values .............................................................. 443
External Peripheral Interface Signals (100LQFP) ................................................. 459
External Peripheral Interface Signals (108BGA) ................................................... 460
EPI SDRAM Signal Connections ......................................................................... 465
Capabilities of Host Bus 8 and Host Bus 16 Modes .............................................. 469
EPI Host-Bus 8 Signal Connections .................................................................... 470
EPI Host-Bus 16 Signal Connections .................................................................. 472
EPI General Purpose Signal Connections ........................................................... 481
External Peripheral Interface (EPI) Register Map ................................................. 487
Available CCP Pins ............................................................................................ 533
General-Purpose Timers Signals (100LQFP) ....................................................... 534
General-Purpose Timers Signals (108BGA) ......................................................... 535
General-Purpose Timer Capabilities .................................................................... 536
Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 537
16-Bit Timer With Prescaler Configurations ......................................................... 538
Counter Values When the Timer is Enabled in RTC Mode .................................... 539
Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 540
Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 541
Counter Values When the Timer is Enabled in PWM Mode ................................... 542
Timers Register Map .......................................................................................... 547
Watchdog Timers Register Map .......................................................................... 582
ADC Signals (100LQFP) .................................................................................... 606
ADC Signals (108BGA) ...................................................................................... 607
Samples and FIFO Depth of Sequencers ............................................................ 608
Differential Sampling Pairs ................................................................................. 616
ADC Register Map ............................................................................................. 624
UART Signals (100LQFP) .................................................................................. 687
UART Signals (108BGA) .................................................................................... 687
Flow Control Mode ............................................................................................. 693
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January 22, 2012
Texas Instruments-Production Data