LM3S5D91 Datasheet, PDF (1203/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
Table 23-4. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
PWM6
25
O
TTL
PWM 6. This signal is controlled by PWM Generator
30
3.
37
41
PWM7
23
O
TTL
PWM 7. This signal is controlled by PWM Generator
31
3.
36
40
GND
9
-
Power Ground reference for logic and I/O pins.
21
33
45
57
69
82
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
7
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
VDD
8
-
Power Positive supply for I/O and some logic.
Power
20
32
44
56
68
81
93
VDDA
3
-
Power The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 25-2 on page 1254, regardless
of system implementation.
VDDC
38
-
Power Positive supply for most of the logic function,
88
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 25-6 on page 1259.
January 22, 2012
Texas Instruments-Production Data
1203