LM3S5D91 Datasheet, PDF (811/1340 Pages) Texas Instruments – Stellaris® LM3S5D91 Microcontroller

Stellaris^® LM3S5D91 Microcontroller
Bit/Field
31:6
5
4
3
2
1
0
Name
reserved
reserved
reserved
ACK
STOP
START
RUN
Type
RO
RO
RO
WO
WO
WO
WO
Reset
0
1
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Acknowledge Enable
Value Description
0 The received data byte is not acknowledged automatically by
the master.
1 The received data byte is acknowledged automatically by the
master. See field decoding in Table 15-5 on page 812.
0
Generate STOP
Value Description
0 The controller does not generate the STOP condition.
1 The controller generates the STOP condition. See field decoding
in Table 15-5 on page 812.
0
Generate START
Value Description
0 The controller does not generate the START condition.
1 The controller generates the START or repeated START
condition. See field decoding in .
0
I²C Master Enable
Value Description
0 The master is disabled.
1 The master is enabled to transmit or receive data. See field
decoding in Table 15-5 on page 812.
January 22, 2012
811
Texas Instruments-Production Data